This invention relates, in general, to processing within a processing environment, and in particular, to a compare, swap and store facility.
To perform a comparison and conditional update of a field, a compare and swap instruction is employed. When a processor executes such an instruction, the compare and swap appears to occur as a single atomic unit of operation, as observed by other processors within the processing environment. The compare and swap is performed using an interlocked update operation that ensures the integrity of the environment. This type of operation is useful in the management of locks, queues, counters, and so forth.
In addition to the compare and swap instruction, a perform locked operation (PLO) instruction is employed as a mechanism in which a processor performs multiple serialized operations, such as compare and swap and store, compare and swap and double store, compare and swap and triple store, and so forth. The perform locked operation provides this functionality by using an external point of serialization (e.g., a lock). The compare and swap of the perform locked operation is not defined to be an interlocked update. Therefore, if an application uses a perform locked operation to manipulate data, all of the updates to the data must be performed using a perform locked operation to maintain integrity of the data. That is, the compare and swap instruction cannot be intermixed with the perform locked operation.